Omron CS1G/H-CPUxxH Instructions Manual page 249

Timer and Counter Instructions
Description
228
Area
Index Registers
Indirect addressing using
Index Registers
When the execution condition for MTIM(543)/MTIMX(554) is ON and the reset
and timer bits are both OFF, MTIM(543)/MTIMX(554) increments the PV in
D2. If the pause bit is turned ON, the timer will stop incrementing the PV, but
the PV will retain its value. MTIM(543)/MTIMX(554) will resume timing when
the pause bit goes OFF again.
The PV (content of D2) is compared to the eight SVs in S through S+7 each
time that MTIM(543)/MTIMX(554) is executed, and if any of the SVs is less
than or equal to the PV, the corresponding Completion Flag (D1 bits 00
through 07) is turned ON.
When the PV reaches 9999, the PV will be reset to 0000 and all of the Com-
pletion Flags will be turned OFF. If the reset bit is turned ON while the timer is
operating or paused, the PV will be reset to 0000 and all of the Completion
Flags will be turned OFF.
to
Timer input
Timer PV (D2)
Completion
flags (D1)
The following table shows the operation of MTIM(543)/MTIMX(554) for the
four possible combinations of the reset and pause bits.
Reset bit Pause bit
(Bit 08) (Bit 09)
OFF OFF The PV will be updated and the corresponding Completion
Flag will be turned ON when SV ≤ PV.
ON The PV will not be updated and MTIM(543)/MTIMX(554)
will be treated as NOP(000).
D1 D2
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Timer PV
Timer SVs
SV 7
SV 2
SV 1
SV 0
0
Bit 7
Bit 2
Bit 1
Bit 0
Operation
Section 3-6
S
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