Intel 80C188EC User Manual page 96

T4
or TI
CLKOUT
1
ALE
AD15:0
A19:16
S2:0
BHE
NOTES:
1. : Clock high to ALE high, S2:0 valid.
T
CHOV
2. : Clock low to address valid, BHE valid.
T
CLOV
3. : Address valid to ALE low (address setup to ALE).
T
AVLL
4. : Clock high to ALE low.
T
CHOV
5. : Clock low to address invalid (address hold from clock low).
T
CLOF
6. : ALE low to address invalid (address hold from ALE).
T
LLAX
Figure 3-10. Address/Status Phase Signal Relationships
T1 T2
4
5
2
3
Valid
Valid
BUS INTERFACE UNIT
6
A1101-0A
3-11