Intel 80C188EC User Manual page 407

MATH COPROCESSING
Latch
EN
A
D
D
R
E
S
S
A2
A19:0
A1
Figure 14-4. 80C187 Exception Trapping via Processor Interrupt Pin
14-14
80C186
Modular Core
ERROR
RESOUT
CS x
INT x
BUSY
PEREQ
ALE
NCS
A19:A16
RD
AD15:0
WR
CLKOUT
D15:0
D15:0 CLK
CMD1
NPWR
CMD0
NPRD
80C187
NPS1
CKM
PEREQ
BUSY
NPS2
ERROR
RESET
C
D Q
'74
Q
S
C
D Q
'74
S
A1256-01