Intel 80C188EC User Manual page 153

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CLOCK GENERATION AND POWER MANAGEMENT
CLKIN
V cc
CLKOUT
UCS, LCS
GCS7:0, NPS
T0OUT, T1OUT
TXD1:0
HLDA, ALE
RXI1, TXI1
DMAI0, DMAI1
A19:16
AD15:0, S2:0
RD, WR, DEN
DT/R, LOCK
RESIN
RESOUT
NOTES:
1. CLKOUT synchronization occurs on the rising edge of RESIN. If RESIN is sampled high while
CLKOUT is high (solid line), then CLKOUT will remain low for two CLKIN periods. If RESIN is
sampled high while CLKOUT is low (dashed line), the CLKOUT will not be affected.
5-8
V
cc
and CLKIN stable to output valid 28 CLKIN periods (max)
V
and CLKIN stable to
cc
RESET high, approximately
32 CLKIN periods.
Figure 5-6. Cold Reset Waveform
1
RESET high to
first bus activity,
7 CLKOUT periods.
A1116-0A

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