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INSTRUCTION SET OPCODES AND CLOCK CYCLES
Function
DATA TRANSFER INSTRUCTIONS
MOV = Move
register to register/memory
register/memory to register
immediate to register/memory
immediate to register
memory to accumulator
accumulator to memory
register/memory to segment register
segment register to register/memory
PUSH = Push
memory
register
segment register
immediate
POP = Pop
memory
register
segment register
PUSHA = Push all
POPA = Pop all
XCHG = Exchange
register/memory with register
register with accumulator
XLAT = Translate byte to AL
IN = Input from
fixed port
variable port
OUT = Output from
fixed port
variable port
NOTES:
1.
Clock cycles are given for 8-bit/16-bit operations.
2.
Clock cycles are given for jump not taken/jump taken.
3.
Clock cycles are given for interrupt taken/interrupt not taken.
4.
If TEST = 0
Shading indicates additions and enhancements to the 8086/8088 instruction set. See Appendix A, "80C186
Instruction Set Additions and Extensions," for details.
D-2
Table D-2. Instruction Set Summary
Format
1 0 0 0 1 0 0 w
mod reg r/m
1 0 0 0 1 0 1 w
mod reg r/m
1 1 0 0 0 1 1 w
mod 000 r/m
1 0 1 1 w reg
data
1 0 1 0 0 0 0 w
addr-low
1 0 1 0 0 0 1 w
addr-low
1 0 0 0 1 1 1 0
mod 0 reg r/m
1 0 0 0 1 1 0 0
mod 0 reg r/m
1 1 1 1 1 1 1 1
mod 110 r/m
0 1 0 1 0 reg
0 0 0 reg 1 1 0
0 1 1 0 1 0 s 0
data
1 0 0 0 1 1 1 1
mod 000 r/m
0 1 0 1 1 reg
0 0 0 reg 1 1 1
(reg ?01)
0 1 1 0 0 0 0 0
0 1 1 0 0 0 0 1
1 0 0 0 0 1 1 w
mod reg r/m
1 0 0 1 0 reg
1 1 0 1 0 1 1 1
1 1 1 0 0 1 0 w
port
1 1 1 0 1 1 0 w
1 1 1 0 0 1 0 w
port
1 1 1 0 1 1 0 w
data
data if w=1
data if w=1
addr-high
addr-high
data if s=0
Clocks
Notes
2/12
2/9
12/13
(1)
3/4
(1)
9
8
2/9
2/11
16
10
9
10
20
10
8
36
51
4/17
3
11
10
8
9
7
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