Intel 80C188EC User Manual page 383

INPUT/OUTPUT PORTS
From Integrated
Peripheral
Read Port
Data latch
Write Port
Data Latch
Read Port
Pin State
Read Port
Direction Control
Internal Data
Bus (F-Bus)
Write Port
Direction
Read Port
Direction
Write Port
Control
To Integrated
Peripheral
Figure 13-2. Simplified Logic Diagram of an Output Port Pin
13-4
Q
D
Q
Port Data Latch
Q
D
Q
Port Direction Latch
Q
D
Q
Port Control Latch
Output Driver
(Permenantly Disabled)
I0
Q
I1
S
SYNC
Pin
A1248-0A