Table of Contents
Advertisement
OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
Single Step — Type 1
The Single Step trap occurs after the CPU executes one instruction with the Trap Flag (TF) bit set
in the Processor Status Word. This allows programs to execute one instruction at a time. Inter-
rupts are not generated after prefix instructions (e.g., REP), after instructions that modify segment
registers (e.g., POP DS) or after the WAIT instruction. Vectoring to the single-step interrupt ser-
vice routine clears the Trap Flag bit. An IRET instruction in the interrupt service routine restores
the Trap Flag bit to logic "1" and transfers control to the next instruction to be single-stepped.
Breakpoint Interrupt — Type 3
The Breakpoint Interrupt is a single-byte version of the INT instruction. It is commonly used by
software debuggers to set breakpoints in RAM. Because the instruction is only one byte long, it
can substitute for any instruction.
Interrupt on Overflow — Type 4
The Interrupt on Overflow trap occurs if the Overflow Flag (OF) bit is set in the Processor Status
Word and the INT0 instruction is executed. Interrupt on Overflow is a common method for han-
dling arithmetic overflows conditionally.
Array Bounds Check — Type 5
An Array Bounds trap occurs when the array index is outside the array bounds during execution
of the BOUND instruction (see Appendix A, "80C186 Instruction Set Additions and Exten-
sions").
Invalid Opcode — Type 6
Execution of an undefined opcode causes an Invalid Opcode trap.
Escape Opcode — Type 7
The Escape Opcode fault is used for floating point emulation. With 80C186 Modular Core family
members, this fault is enabled by setting the Escape Trap (ET) bit in the Relocation Register (see
Chapter 3, "Peripheral Control Block"). When a floating point instruction is executed with the
Escape Trap bit set, the Escape Opcode fault occurs, and the Escape Opcode service routine em-
ulates the floating point instruction. If the Escape Trap bit is cleared, the CPU sends the floating
point instruction to an external 80C187.
80C188 Modular Core Family members do not support the 80C187 interface and always generate
the Escape Opcode Fault.
2-43
Advertisement
Table of Contents
