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INSTRUCTION SET OPCODES AND CLOCK CYCLES
Table D-2. Instruction Set Summary (Continued)
Function
BIT MANIPULATION INSTRUCTIONS (Continued)
TEST= And function to flags, no result
register/memory and register
immediate data and register/memory
immediate data and accumulator
Shifts/Rotates
register/memory by 1
register/memory by CL
register/memory by Count
STRING MANIPULATION INSTRUCTIONS
MOVS = Move byte/word
INS = Input byte/word from DX port
OUTS = Output byte/word to DX port
CMPS = Compare byte/word
SCAS = Scan byte/word
STRING MANIPULATION INSTRUCTIONS (Continued)
LODS = Load byte/word to AL/AX
STOS = Store byte/word from AL/AX
Repeated by count in CX:
MOVS = Move byte/word
INS = Input byte/word from DX port
OUTS = Output byte/word to DX port
CMPS = Compare byte/word
SCAS = Scan byte/word
LODS = Load byte/word to AL/AX
STOS = Store byte/word from AL/AX
NOTES:
1.
Clock cycles are given for 8-bit/16-bit operations.
2.
Clock cycles are given for jump not taken/jump taken.
3.
Clock cycles are given for interrupt taken/interrupt not taken.
4.
If TEST = 0
Shading indicates additions and enhancements to the 8086/8088 instruction set. See Appendix A, "80C186
Instruction Set Additions and Extensions," for details.
D-6
Format
1 0 0 0 0 1 0 w
mod reg r/m
1 1 1 1 0 1 1 w
mod 000 r/m
1 0 1 0 1 0 0 w
data
1 1 0 1 0 0 0 w
mod TTT r/m
1 1 0 1 0 0 1 w
mod TTT r/m
1 1 0 0 0 0 0 w
mod TTT r/m
1 0 1 0 0 1 0 w
0 1 1 0 1 1 0 w
0 1 1 0 1 1 1 w
1 0 1 0 0 1 1 w
1 0 1 0 1 1 1 w
1 0 1 0 1 1 0 w
1 0 1 0 1 0 1 w
1 1 1 1 0 0 1 0
1 0 1 0 0 1 0 w
1 1 1 1 0 0 1 0
0 1 1 0 1 1 0 w
1 1 1 1 0 0 1 0
0 1 1 0 1 1 1 w
1 1 1 1 0 0 1 z
1 0 1 0 0 1 1 w
1 1 1 1 0 0 1 z
1 0 1 0 1 1 1 w
1 1 1 1 0 0 1 0
0 1 0 1 0 0 1 w
1 1 1 1 0 1 0 0
0 1 0 1 0 0 1 w
data
data if w=1
data if w=1
count
Clocks
Notes
3/10
4/10
3/4
(1)
2/15
5+n/17+n
5+n/17+n
14
14
14
22
15
12
10
8+8n
8-8n
8+8n
5+22n
5+15n
6+11n
6+9n
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