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Register Name:
Register Mnemonic:
Register Function:
15
Bit
Bit Name
Mnemonic
SFNM
Special
Fully
Nested
Mode
AEOI
Automatic
EOI Mode
FT2:0
Factory
Test Mode
Select
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
Initialization Command Word 4
ICW4 (accessed through MPICP1 and SPICP1)
Selects SFN Mode and AEOI Mode.
0
0
Reset
State
X
Set to select Special Fully Nested Mode.
NOTE: Special Fully Nested Mode must be
used only in the master of a cascaded system.
X
Set to select Automatic EOI Mode.
NOTE: Automatic EOI Mode must be used only
in the master of a cascaded system.
XXX
These bits select factory test modes.
CAUTION: You must write the FT2:0 bits with
the following values. Failure to do so will cause
system failure and may cause system damage.
FT2
FT1
0
0
Figure 8-16. ICW4 Register
INTERRUPT CONTROL UNIT
F
F
A
S
F
T
T
E
0
N
2
1
O
M
I
Function
FT0
1
0
F
T
0
A1224-0A
8-29
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