Functional Overview - NEC µPD72257 Preliminary User's Manual

System Controller

4.1 Functional Overview

Figure 4-1
Reset interrupt
The System Controller incorporates several functional blocks to generate reset
and clock signals.
It further evaluates the settings of the external mode signals MODE[11:0] and
configures the start up configurations of the clock generator and the pin
multiplexers accordingly.
Several registers hold bits to various functions of other on-chip modules, like the
Video Output and Input interfaces and the memories.
The diagram below gives an overview of the System Controller functions.
XT1/XT2
Reset
RESET
control
System
watchdog
Boot mode
MODE[11:0]
control
Pin mux
control
System Controller block diagram
Upon activation of any reset the reset interrupt signal RESINT is generated, which
is monitored in the Host-I/F's HOSTINTSTAT register.
Preliminary User's Manual S19203EE1V3UM00
Clock
generator
IRAMCKEN
Memory I/F
control
Video Output 0
control
Video Output 1
Registers
control
Video Input
APB I/F
control
Chapter 4
SYSRESET
VO0CLK
VO1CLK
HCLK
IRAMCLK
SDREN
VO0CSSEL
VO0VSSEL
VO0RAMEN
VO0LOCKEN
VO1CSSEL
VO1VSSEL
VO1RAMEN
VO1LOCKEN
VISEL[1:0]
VIEN
APB
Pin mux
87