Memory Controller Registers Details - NEC µPD72257 Preliminary User's Manual

External Memory Interface Controller

9.6.2 Memory Controller registers details

9.6.2.1
Access
Address
Initial Value
31 30 29 28
0 0 0 0
R R R R
15 14 13 12
DDATAW
0
a
[1:0]
R/W R/W
a
For Ravin-L the default value "01
Caution
Bit Bit name
14 to 13 DDATAW[1:0]
COLADDRW
12 to 9
[3:0]
MEMSCONR - SDRAM configuration register
This register sets the SDRAM data and address bus properties.
This register can be read/written in 32-bit units.
<MemC_Base> + 00
H
0014 2F48 . This register is initialized by any reset.
H
27 26 25 24
0 0 0
R R R
11 10 9
COLADDRW[3:0]
R/W
" of DDATAW[1:0] must be changed to "00
B
Writing to the read-only bits is ignored, reading returns undefined values.
1. Ravin-L provides only a 16-bit external memory data bus. Thus the
default value "01
to "00 " after any reset and must not be altered afterwards.
B
2. The default value
- "1" of bits 20 and 18
- "0" of bits 19 and 17 to 15
must not be changed.
Function
Specifies SDRAM data width
00
16 bit
B
01
32 bit for Ravin-M only (default)
B
all other prohibited
Caution:
For Ravin-L DDATAW[1:0] must be changed to 00
Number of address bits for column address
0111
8 bit (default)
B
1000
9 bit
B
1001
10 bit
B
1010
11 bit
B
1011
12 bit
B
1100
13 bit
B
Preliminary User's Manual S19203EE1V3UM00
23 22 21
0 0 0 0
R R R R
8 7 6 5
ROWADDRW[3:0]
R/W
" of bit 14 to 13 (DDATAW[1:0]) must be changed
B
Chapter 9
20 19 18 17
1 0 1 0
R/W R/W R/W R/W
4 3 2 1
BKADDRW
0 0
[1:0]
R/W R R
".
B
after reset.
B
16
0
R/W
0
0
R
315