Video Input Registers; Video Input Registers Overview - NEC µPD72257 Preliminary User's Manual

Video Input (Ravin-M only)

6.10 Video Input Registers

6.10.1 Video Input registers overview

Table 6-5
<VIn_Base>
The Video Input is controlled and operated by means of the following registers:
Video Input registers overview
Register function
First field framebuffer start address register
Second field framebuffer start address
register
First pixel register
First line register
Scaled pixels/line register
Scaled lines/field register
Video Input control settings
Scaling factors register
Video Input status register
Active scanline register
Scanline interrupt control register
CSYNC separator control register
Scanlines offset register
YUV level adjustment control register
Video Input revirsion register
The <VIn_Base> base address of the registers is defined in the first section of this
chapter under the key word "Register base addresses".
Preliminary User's Manual S19203EE1V3UM00
Name Address
<VIn_Base> + 00
VInSTARTADDR1
<VIn_Base> + 04
VInSTARTADDR2
<VIn_Base> + 08
VInSTARTX
<VIn_Base> + 0C
VInSTARTY
<VIn_Base> + 10
VInSCALEDWIDTH
<VIn_Base> + 14
VInSCALEDHEIGHT
<VIn_Base> + 18
VInCONTROL
<VIn_Base> + 1C
VInSCALING
<VIn_Base> + 20
VInSTATUS
<VIn_Base> + 24
VInACTSCANLINE
<VIn_Base> + 28
VInSCANLINEINT
<VIn_Base> + 2C
VInSYNCDECODE
<VIn_Base> + 30
VInSTRIDEX
<VIn_Base> + 34
VInADJUSTLEVEL
<VIn_Base> + 50
VInREVISION
Chapter 6
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