NEC µPD72257 Preliminary User's Manual page 175

Graphics controllers
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Video Input (Ravin-M only)
6.10.2.3
Access
Address
Initial Value
31
30
29
28
0
0
0
R
R
R
15
14
13
12
Bit
Bit name
28 to 4
START2[28:4]
VInSTARTADDR2 - Second field framebuffer start address register
This register defines the framebuffer address of the first pixel of the second field
of each frame. The value becomes effective at the next start of the first field (this
can be checked in the VInSTATUS register).
The framebuffer start address is aligned to 8 pixel, thus must be a multiple of 16
byte.
This register can be read/written in 32-bit units.
<VIn_Base> + 04
H
0000 0000
. This register is initialized by any reset.
H
27
26
25
24
11
10
9
8
START2[15:4]
R/W
Writing to the read-only bits is ignored, reading returns undefined values.
Function
Framebuffer start address for the first pixel of the second field
The lower four address bits START2[3:0] are fixed to 0000
16 byte) alignment.
Preliminary User's Manual S19203EE1V3UM00
23
22
21
20
START2[28:16]
R/W
7
6
5
4
Chapter 6
19
18
17
16
3
2
1
0
0
0
0
0
R
R
R
R
due to 8 pixel (i.e. 4 word or
B
175

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