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Memory and Register Map
3.2 Ravin-M Memory and Register Map
Table 3-4
Table 3-5
The memory and register map and the AHB masters priorities of Ravin-M are
shown in tables below.
Ravin-M memory and register map
Address range
0000 0000
to 0000 002F
H
0000 030
to 0000 07FF
H
H
0000 0800
to 0000 08FF
H
0000 0900
to 0000 1CFF
H
0000 1D00
to 0000 1DFF
H
0000 1E00
to 0000 1EFF
H
0000 1F00
to 0000 1FFF
H
0000 2000
to 0000 2FFF
H
0000 3000
to 0000 3FFF
H
0000 4000
to 0000 4FFF
H
0000 5000
to 07FF FFFF
H
0800 0000
to FFFF FFFF
H
Ravin-M AHB master priorities
Priority
1 (highest)
2
3
4
5 (lowest)
Preliminary User's Manual S19203EE1V3UM00
Bus
Host-I/F module
H
internal
Reserved
H
H
APB
H
H
H
H
H
AHB
H
H
Reserved
H
AHB master
Video Output 0 (framebuffer access)
Video Output 1 (framebuffer access)
Video Input (framebuffer access)
Drawing Engine (framebuffer access)
Chapter 3
Target
Host-I/F registers
System Controller registers
Reserved
Drawing Engine registers
Video Input module registers
Reserved
Video Output 0 registers
Memory Controller registers
Video Output 1 registers
External memory bus
Host-I/F
85
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