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Chapter 8
8.9.5.3
Access
Address
Index
Initial Value
31
30
29
28
15
14
13
12
TEXUMASK[4:0]
W
Bit
Bit name
TEXUMASK
31 to 11
[20:0]
TEXVMASK
10 to 0
[10:0]
274
DRWTEXMASK - Texture size or texture address mask
Depending on the clamping mode this register encodes the clamp limit or wrap
mask.
This register can be written in 32-bit units.
<DrwE_Base> + B8
H
46
0000 0000
. This register is initialized by any reset.
H
27
26
25
24
TEXUMASK[20:5]
11
10
9
Function
V mask
U mask
Preliminary User's Manual S19203EE1V3UM00
23
22
21
W
8
7
6
5
TEXVMASK[10:0]
W
Drawing Engine
20
19
18
17
4
3
2
1
16
0
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