NEC µPD72257 Preliminary User's Manual page 322

Chapter 9
9.6.2.5
Access
Address
Initial Value
31 30 29 28
0 0 0 0
R R R R
15 14 13 12
Bit Bit name
15 to 0 TREF[15:0]
322
MEMSREFR - SDRAM refresh register
This register defines the refresh period in auto-refresh mode.
The refresh period is the time between two refresh operations, the Memory
Controller carries out automatically on consecutie rows.
The refresh period is defined in number of system clocks periods 1/f
This register can be read/written in 32-bit units.
<MemC_Base> + 10
H
0000 0410 . This register is initialized by any reset.
H
27 26 25 24
0 0 0 0
R R R R
11 10 9 8
TREF[15:0]
Writing to the read-only bits is ignored, reading returns undefined values.
Function
Number of clock cycles between consecutive refresh cycles (default: 1040 clocks).
Preliminary User's Manual S19203EE1V3UM00
External Memory Interface Controller
23 22 21
0 0 0
R R R
7 6 5
R/W
HCLK
20 19 18 17
0 0 0 0
R R R R
4 3 2 1
.
16
0
R
0