Adbus-I/F Data Access - NEC µPD72257 Preliminary User's Manual

Chapter 5
Table 5-5
ADBus-I/F address
HADA
[20:19] [20:13]
≠
00
B
00000000
B
01
B
10 = xxxx xxxx
B
11
B
=
00
B
00000000
B
Caution

5.3.3 ADBus-I/F data access

Word combining
134
- if HADA[20:19] = 0 and HADA[18:13] = 0:
iADDR[27:0] = (0<<19) or HADA[18:0] (Host-I/F registers or APB)
- if HADA[20:19] = 0 and HADA[18:13] ≠ 0:
iADDR[27:0] = (BASEADDR0<<19) or HADA[18:0] (AHB)
- if HADA[20:19] ≠ 0:
iADDR[27:0] = (BASEADDRn<<19) or HADA[18:0] (AHB, n = 1 to 3)
The table below summarizes the behaviour of the offset addressing function.
Generation of the internal address iADDR[27:0]
Selected
base address
HOSTBASE0.
BASEADDR[8:0]
HOSTBASE1.
BASEADDR[8:0]
HOSTBASE2.
B
BASEADDR[8:0]
HOSTBASE3.
BASEADDR[8:0]
000000000
B
Since all ADBus-I/F addresses with HADA[20:13] = 0 are assumed to access the
Host-I/F or APB registers , no HOSTADBASEn register is used to compose iADDR
[27:0], though HADA[20:19] = 00
base address. Instead the offset 0 is used and the resulting address has iADDR
[27:13] = 0, though HOSTBASE0.BASEADDR[8:0] may define an address ≠ 0.
Thus define HOSTBASE0.BASEADDR[8:0] = 0 and do not change this setting.
Data read/write accesses on the ADBus-I/F can be performed as byte and
halfword accesses. The size is derived from the ADBus-I/F byte enable signals
HADBEN[1:0].
The word combining function allows to combine two consecutive 16-bit data
transfers on the ADBus to a 32-bit data word, thus enabling also data transfers in
word size.
For minimizing the data transfer time on the ADBus and load on the internal
busses, the data of two half-word accesses to consecutive addresses can be
combined to one word, if the word combining feature is enabled by
HOSTADBASEn.WC = 1.
For each of the four 512 KB pages, selected by HADA[20:19], the word combining
feature can be enabled separately by setting the WC bit to 1 in the corresponding
HOSTADBASEn register.
Word combining is only performed under following conditions:
• word combining is enabled for the concerned 512 KB page:
HOSTADBASEn.WC = 1
Preliminary User's Manual S19203EE1V3UM00
Internal address
iADDR[27:0]
(HOSTADBASE0.BASEADDR[8:0]<<19) or HADA[18:0]
(HOSTADBASE1.BASEADDR[8:0]<<19) or HADA[18:0]
(HOSTADBASE2.BASEADDR[8:0]<<19) or HADA[18:0]
(HOSTADBASE3.BASEADDR[8:0]<<19) or HADA[18:0]
(0<<19) or HADA[18:0]
specifies the HOSTADBASE0.BASEADDR[8:0]
B
Host CPU Interface