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Pin Functions
2.4.2.2
Setup
Features
Figure 2-4
Ravin-M pinout option 2
Ravin-M pinout option 2 is set up by the following register setting:
SYSPINMUX = 00C0 0002
PINMUX[3:0] = 0010
B
all SMUXm = 0
BUFPUEN[7:0] = C0
H
Ravin-M pinout option 2 provides following features:
•
16-bit ADBus Host-I/F
-
separate address/data buses HADD[15:0], HADA[20:0]
•
Video Output I/F 0
-
18-bit RGB(6/6/6)
-
composite VO0CSYNC or separate VO0HSYNC/VO0VSYNC
-
VO0EN display enable signal
•
Video Input I/F
-
ITU656
•
16-bit SDRAM/SRAM-I/F
Ravin-M pin layout option 2
Preliminary User's Manual S19203EE1V3UM00
H
pinout option 2
no SMUX selection
internal pull-up resistors enabled for
-
group 7: HINT, HADWAIT, HADCS, MDFBCLK,
VI0CLK
-
group 6: VI0R[5:0]ITU[5:0], VI0G[1:0]ITU[7:6]
Xtal, Reset
Xtal, Reset, Test
3.3V, 1.5V
3.3V, 1.5V
System Control
System Control
Power Supply
Power Supply
Mem I/F 16-bit SDRAM/SRAM
Mem I/F 16bit SD/SR
16-bit SDRAM
16-bit SRAM
Chapter 2
41
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