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Chapter 2
2.3 Ravin-L Pin Functions
Features
30
For Ravin-L only a single pinout is available. It is set up by the following register
setting:
If SYSBOOTMODE.BOOTMODE9 = 0 (IRAM disabled): SYSPINMUX = 00ED 0003
PINMUX[3:0] = 0011
pinout option 3 (fixed)
B
all SMUXm = 0
no SMUX selection (fixed)
internal pull-up resistors enabled for
BUFPUEN[7:0] = ED
H
If SYSBOOTMODE.BOOTMODE9 = 1 (IRAM enabled): SYSPINMUX = 00FD 0003
PINMUX[3:0] = 0011
pinout option 3 (fixed)
B
all SMUXm = 0
no SMUX selection (fixed)
internal pull-up resistors enabled for
BUFPUEN[7:0] = FD
H
The Ravin-L pinout provides following features:
•
8-bit LBus Host-I/F
-
multiplexed address/data bus HLBD[7:0]
•
Video Output I/F 0
-
18-bit RGB(6/6/6)
-
composite VO0CSYNC or separate VO0HSYNC/VO0VSYNC
•
16-bit SDRAM/SRAM-I/F
Preliminary User's Manual S19203EE1V3UM00
-
group 7: HINT, HLBDRQ, HLBCS, MDFBCLK
-
group 6: n.c.
-
group 5: n.c.
-
group 3: n.c.
-
group 2: n.c.
-
group 0: n.c.
-
group 7: HINT, HLBDRQ, HLBCS, MDFBCLK
-
group 6: n.c.
-
group 5: n.c.
-
group 4: n.c.
-
group 3: n.c.
-
group 2: n.c.
-
group 0: n.c.
Pin Functions
H
H
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