NEC µPD72257 Preliminary User's Manual page 55

Pin Functions
2.4.2.11
Setup
Features
Figure 2-13
Ravin-M pinout option 9
Ravin-M pinout option 9 is set up by the following register setting:
SYSPINMUX = 00C8 0009
PINMUX[3:0] = 1001
pinout option 9
B
all SMUXm = 0 no SMUX selection
internal pull-up resistors enabled for
BUFPUEN[7:0] = C8
H
Ravin-M pinout option 9 provides following features:
• 8-bit LBus Host-I/F
- multiplexed address/data bus HLBD[7:0]
• Video Output I/F 0
- 18-bit RGB(6/6/6)
- composite VO0CSYNC or separate VO0HSYNC/VO0VSYNC
- VO0EN display enable signal
• Video Output I/F 1
- 16-bit RGB(5/6/5)
- composite VO1CSYNC or separate VO1HSYNC/VO1VSYNC or
VO1HSYNC and VO1EN (via VO1VSYNC selectable by
SYSVOCTR register)
• Video Input I/F
- ITU656
- 18-bit RGB(6/6/6)
- composite (VI0SYNC1) or separate (VI0SYNC1/VI0SYNC2)
• 32-bit SDRAM-I/F
Ravin-M pinout option 9
Preliminary User's Manual S19203EE1V3UM00
H
- group 7: HINT, HADWAIT, HADCS, MDFBCLK,
VI0CLK
- group 6: VI0R[5:0]ITU[5:0], VI0G[1:0]ITU[7:6]
- group 3: VI0G[4:2]
Xtal, Reset
Xtal, Reset, Test 3.3V, 1.5V 3.3V, 1.5V
System Control System Control Power Supply Power Supply
Mem I/F 32-bit SDRAM
32-bit SDRAM
32bit SD
Chapter 2
55