Performance Counters - NEC µPD72257 Preliminary User's Manual

Chapter 8

8.8 Performance Counters

Table 8-2
252
The Drawing Engine features two independent 32-bit performance counter
register DRWPERFCOUNTk (k = 1, 2) to count the number of occurrences of a
certain event.
The events to count can be set up independently for each performance counter
register via the performance counter control register
DRWPERFTRIGGER.PERFTRIGGER2 for DRWPERFCOUNT2 respectively
DRWPERFTRIGGER.PERFTRIGGER1 for DRWPERFCOUNT1.
The performance counter trigger event can be chosen from below list:
Performance counter trigger events
DRWPERFTRIGGER.
PERFTRIGGERk
0
1
2
3
4
5
6
7
8
9
10
11
12
13
31
Preliminary User's Manual S19203EE1V3UM00
Event
disable performance counter
Drawing Engine active cycles
framebuffer read access
framebuffer write access
texture read access
invisible pixels (enumerated but selected with alpha 0%)
invisible pixels while internal FIFO is empty (lost cycles)
display list reader active cycles
framebuffer read hits
framebuffer read misses
framebuffer write hits
framebuffer write misses
texture read hits
texture read misses
every clock cycle (for use as timer)
Drawing Engine