NEC µPD72257 Preliminary User's Manual page 50

Chapter 2
2.4.2.8
Setup
Features
Figure 2-10
50
Ravin-M pinout option 7c
Ravin-M pinout option 7c is set up by the following register setting:
SYSPINMUX = 0080 1F17
PINMUX[3:0] = 0111
pinout option 7
B
SMUX[95:91] = 1 VO1B[1:0], VO1R[1:0], VO1G0 output at pins 91 to 95
SMUX127 = 1 VO0EN output at pin 127
all other SMUXm = 0 no SMUX selection
internal pull-up resistors enabled for
BUFPUEN[7:0] = 80
H
Ravin-M pinout option 7c provides following features:
• 8-bit LBus Host-I/F
- multiplexed address/data bus HLBD[7:0]
• Video Output I/F 0
- 18-bit RGB(6/6/6)
- composite VO0CSYNC or separate VO0HSYNC/VO0VSYNC
- VO0EN display enable signal
• Video Output I/F 1
- 18-bit RGB(6/6/6)
- composite VO1CSYNC or separate VO1HSYNC/VO1VSYNC or
VO1HSYNC and VO1EN (via VO1VSYNC selectable by
SYSVOCTR register)
• Video Input I/F
- ITU656
• 32-bit SDRAM/SRAM-I/F
Ravin-M pinout option 7c
Preliminary User's Manual S19203EE1V3UM00
H
- group 7: HINT, HADWAIT, HADCS, MDFBCLK,
VI0CLK
Xtal, Reset Xtal, Reset 3.3V, 1.5V 3.3V, 1.5V
System Control System Control Power Supply Power Supply
Mem I/F 32-bit SDRAM/SRAM
32-bit SDRAM 32-bit SRAM/Flash
Pin Functions