Xilinx Virtex-4 ML461 User Manual page 98

Memory interfaces
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Appendix B: LCD Interface
Table B-7: Display Instructions (Continued)
Instruction
Set column address MSB
Set column address LSB
This instruction sets the address of the display data RAM. When a read or write to or from the display data RAM occurs, the addresses are
automatically increased.
ADC select
This instruction changes the relationship between RAM column address and segment driver.
ADC = 0, SEG1 --> SEG132
default mode
ADC = 1, SEG132 --> SEG1
Reverse display ON/OFF
Entire display ON/OFF
This instruction forces the display to be turned on regardless the contents of the display data RAM. The contents of the display data RAM are
saved. This instruction has priority over reverse display.
LCD bias select
This instruction selects the LCD bias.
98
RS
RW
DB7
DB6
0
0
0
0
0
0
0
0
Y7
Y6
Y5
Y4
0
0
0
0
0
0
0
0
..
..
..
..
1
1
1
1
1
1
1
1
0
0
1
0
0
0
1
0
REV
RAM bit data = '1'
0
1
0
0
1
0
0
0
1
0
Duty
ratio
1/65
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DB5
DB4
0
1
0
0
Y3
Y2
0
0
0
0
..
..
1
1
1
1
1
0
1
0
RAM bit data = '0'
Pixel ON
Pixel OFF
Pixel OFF
Pixel ON
1
0
1
0
Bias = 0
Bias = 1
1/7
1/9
Virtex-4 ML461 Development Board User Guide
DB3
DB2
DB1
Y7
Y6
Y5
Y3
Y2
Y1
Y1
Y0
Col
0
0
Addr 0
Col
0
1
Addr 1
..
..
...
Col
1
0
Addr
130
Col
1
1
Addr
131
0
0
0
0
1
1
0
1
0
0
0
1
UG079 (v1.1) September 5, 2007
R
DB0
Y4
Y0
ADC
REV
EON
BIAS

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