Xilinx Virtex-4 ML461 User Manual page 88

Appendix B: LCD Interface
Table B-2: LCD Panel (Continued)
DB3 DB2 DB1 DB0 Data
DB0
DB1
DB2
DB3
0 0 1 0
DB4
DB5
DB6
DB7
DB0
DB1
DB2
DB3
0 0 1 1
DB4
DB5
DB6
DB7
DB0
DB1
DB2
DB3
0 1 0 0
DB4
DB5
DB6
DB7
DB0
DB1
DB2
DB3
0 1 0 1
DB4
DB5
DB6
DB7
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Address
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
2CH
2DH
2EH
2FH
UG079 (v1.1) September 5, 2007
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