Xilinx Virtex-4 ML461 User Manual page 3

Date Version Revision
09/05/07 1.1 Chapter 1: Added XAPP721 to "Virtex-4 ML461 Memory Interfaces Development
Board" section.
Chapter 3: Added tables on voltage margining: Table 3-12, Table 3-13, and Table 3-14.
Updated "Hardware Overview." Updated Table 3-2.
Chapter 4: Added "Power Measurements on the ML461" section. Updated link to
Samsung documentation in Table 4-1 and Table 4-3.
Chapter 5: Updated Read Data (Q) values in Table 5-5.
Appendix A: Updated FPGA pinout tables.
General text edits.
UG079 (v1.1) September 5, 2007 www.xilinx.com Virtex-4 ML461 Development Board User Guide