Xilinx Virtex-4 ML461 User Manual page 58

Memory interfaces
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Appendix A: FPGA Pinouts
Table A-1: FPGA #1 Pinout (Continued)
Signal Name
DDR1_DIMM_DM_DQS_BY6_H_P
DDR1_DIMM_DM_DQS_BY7_H_N
DDR1_DIMM_DM_DQS_BY7_H_P
DDR1_DIMM_DM_DQS_BY8_H_N
DDR1_DIMM_DM_DQS_BY8_H_P
DDR1_DIMM_DM_DQS_BY9_H_N
DDR1_DIMM_DM_DQS_BY9_H_P
DDR1_DIMM_DM_DQS_BY10_H_N
DDR1_DIMM_DM_DQS_BY10_H_P
DDR1_DIMM_DM_DQS_BY11_H_N
DDR1_DIMM_DM_DQS_BY11_H_P
DDR1_DIMM_DM_DQS_BY12_H_N
DDR1_DIMM_DM_DQS_BY12_H_P
DDR1_DIMM_DM_DQS_BY13_H_N
DDR1_DIMM_DM_DQS_BY13_H_P
DDR1_DIMM_DM_DQS_BY14_H_N
DDR1_DIMM_DM_DQS_BY14_H_P
DDR1_DIMM_DM_DQS_BY15_H_N
DDR1_DIMM_DM_DQS_BY15_H_P
DDR1_DIMM_DM_DQS_CB0_7_H_N
DDR1_DIMM_DM_DQS_CB0_7_H_P
DDR1_DIMM_DM_DQS_CB8_15_H_N
DDR1_DIMM_DM_DQS_CB8_15_H_P
DDR1_DIMM_DQS_BY0_L_N
DDR1_DIMM_DQS_BY0_L_P
DDR1_DIMM_DQS_BY1_L_N
DDR1_DIMM_DQS_BY1_L_P
DDR1_DIMM_DQS_BY2_L_N
DDR1_DIMM_DQS_BY2_L_P
DDR1_DIMM_DQS_BY3_L_N
DDR1_DIMM_DQS_BY3_L_P
DDR1_DIMM_DQS_BY4_L_N
DDR1_DIMM_DQS_BY4_L_P
DDR1_DIMM_DQS_BY5_L_N
DDR1_DIMM_DQS_BY5_L_P
DDR1_DIMM_DQS_BY6_L_N
DDR1_DIMM_DQS_BY6_L_P
58
Pin
DDR1 DIMM Memory Interface (cont'd)
AC9
DDR1_DIMM_DQS_BY7_L_N
AE4
DDR1_DIMM_DQS_BY7_L_P
AF4
DDR1_DIMM_DQS_BY8_L_N
H5
DDR1_DIMM_DQS_BY8_L_P
H6
DDR1_DIMM_DQS_BY9_L_N
K6
DDR1_DIMM_DQS_BY9_L_P
K7
DDR1_DIMM_DQS_BY10_L_N
A19
DDR1_DIMM_DQS_BY10_L_P
A20
DDR1_DIMM_DQS_BY11_L_N
A18
DDR1_DIMM_DQS_BY11_L_P
B18
DDR1_DIMM_DQS_BY12_L_N
AB22
DDR1_DIMM_DQS_BY12_L_P
AC22
DDR1_DIMM_DQS_BY13_L_N
AE18
DDR1_DIMM_DQS_BY13_L_P
AF18
DDR1_DIMM_DQS_BY14_L_N
W5
DDR1_DIMM_DQS_BY14_L_P
W6
DDR1_DIMM_DQS_BY15_L_N
AB5
DDR1_DIMM_DQS_BY15_L_P
AC5
DDR1_DIMM_DQS_CB0_7_L_N
P19
DDR1_DIMM_DQS_CB0_7_L_P
P20
DDR1_DIMM_DQS_CB8_15_L_N
T19
DDR1_DIMM_DQS_CB8_15_L_P
U20
DDR1_DIMM_DQ_BY0_B0
G9
DDR1_DIMM_DQ_BY0_B1
G10
DDR1_DIMM_DQ_BY0_B2
C6
DDR1_DIMM_DQ_BY0_B3
B6
DDR1_DIMM_DQ_BY0_B4
D25
DDR1_DIMM_DQ_BY0_B5
D26
DDR1_DIMM_DQ_BY0_B6
F23
DDR1_DIMM_DQ_BY0_B7
F24
DDR1_DIMM_DQ_BY1_B0
AC26
DDR1_DIMM_DQ_BY1_B1
AC25
DDR1_DIMM_DQ_BY1_B2
AB21
DDR1_DIMM_DQ_BY1_B3
AC21
DDR1_DIMM_DQ_BY1_B4
AF7
DDR1_DIMM_DQ_BY1_B5
AF8
DDR1_DIMM_DQ_BY1_B6
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Signal Name
Virtex-4 ML461 Development Board User Guide
UG079 (v1.1) September 5, 2007
R
Pin
AB6
AC6
E2
E3
D1
D2
G17
G18
A23
A24
Y24
AA24
AC19
AD19
Y3
Y4
Y5
Y6
T23
T24
R19
R20
C4
D4
A4
B4
F7
G7
E6
E5
A5
A6
E9
F9
G8
F8
A9

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