Documentation Related To The Intel Agilex General Purpose I/O And Lvds Serdes User Guide - Intel Agilex User Manual

UG-20214 | 2019.04.02
Send Feedback
6. Documentation Related to the Intel Agilex General
Purpose I/O and LVDS SERDES User Guide
The following are the links to references related to Intel Agilex GPIO and LVDS
SERDES system.
Table 18. References
Reference
Intel Agilex Device Data Sheet
Intel Agilex Device Family Pin Connection
Guidelines
Intel Agilex Clocking and PLL User Guide
Intel Agilex Configuration User Guide
Intel Agilex Power Management User Guide
IBIS Models for Intel Devices
SPICE Models for Intel Devices.
AN 433: Constraining and Analyzing Source-
Synchronous Interfaces
Intel Corporation. All rights reserved. Agilex, Altera, Arria, Cyclone, Enpirion, Intel, the Intel logo, MAX, Nios,
Quartus and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or
other countries. Intel warrants performance of its FPGA and semiconductor products to current specifications in
accordance with Intel's standard warranty, but reserves the right to make changes to any products and services
at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel
customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
This document describes the electrical characteristics, switching
characteristics, configuration specifications, and timing for Intel Agilex
devices.
This document describes the Intel Agilex the guidelines for all the pins in
the device.
This document describes the Intel Agilex clock and PLL specifications and
guidelines.
This document describes the Intel Agilex configuration specifications and
guidelines.
This document describes Intel Agilex power management specifications
and guidelines.
This link provides IBIS models for Intel Agilex devices.
This link provides HSPIC models for Intel Agilex devices.
This application note describes techniques for constraining and analyzing
source-synchronous interfaces.
Description
ISO
9001:2015
Registered