Texas Instruments MSP50C614 Manuals

Manuals and User Guides for Texas Instruments MSP50C614. We have 1 Texas Instruments MSP50C614 manual available for free PDF download: User Manual

Texas Instruments MSP50C614 User Manual

Texas Instruments MSP50C614 User Manual (414 pages)

Mixed-Signal Processor

Brand: Texas Instruments | Category: Signal Processors | Size: 1.86 MB

Table of Contents

Table of Contents

7
Assembly Language Instructions

93
- Introduction
  94
  - Data Pointer Register (DP)
    94
  - Multiplier Register (MR)
    94
  - Program Counter (PC)
    94
  - Shift Value Register (SV)
    94
- System Registers
  94
- Top of Stack (TOS) Register Operation
  95
  - Product High Register (PH)
    96
  - Product Low Register (PL)
    96
  - Accumulators (AC0–AC31)
    96
  - Accumulator Pointers (AP0–AP3)
    97
  - Indirect Register (R0–R7)
    97
  - String Register (STR)
    98
- Status Register (STAT)
  98
  - Instruction Syntax and Addressing Modes
    100
  - MSP50P614/MSP50C614 Instruction Syntax
    100
- Addressing Mode Encoding
  101
  - Addressing Modes
    101
- Auto Increment and Auto Decrement Modes
  103
- MSP50P614/MSP50C614 Addressing Modes Summary
  103
- Flag Addressing Field {Flagadrs} for Certain Flag Instructions (Class 8A)
  104
- Initial Processor State for the Examples before Execution of Instruction
  105
  - Immediate Addressing
    105
  - Direct Addressing
    106
- Indirect Addressing Syntax
  107
  - Relative Addressing
    108
- Relative Flag Addressing
  111
- Instruction Syntax and Addressing Modes
  112
  - Tag/Flag Bits
    112
- Instruction Classification
  114
- Symbols and Explanation
  114
- Classes and Opcode Definition
  117
- Class 1 Instruction Encoding
  118
- Class 1A Instruction Description
  118
- Class 1B Instruction Description
  118
- Class 2 Instruction Encoding
  118
- Class 3 Instruction Encoding
  118
- Class 4A Instruction Description
  118
- Class 4A Instruction Encoding
  118
- Class 4B Instruction Description
  118
- Class 4C Instruction Description
  118
- Class 4D Instruction Description
  127
- Class 5 Instruction Description
  128
  - Class 5 Instructions: Memory Reference
    128
- Class 5 Instruction Encoding
  128
- Class 6A Instruction Description
  130
  - Class 6 Instructions: Port and Memory Reference
    130
- Class 6A Instruction Encoding
  130
- Class 6B Instruction Description
  131
  - Class 7 Instructions: Program Control
    131
- Class 7 Instruction Encoding and Description
  132
- Class 8A Instruction Encoding
  133
  - Class 8 Instructions: Logic and Bit
    133
- Class 8A Instruction Description
  134
- Class 8B Instruction Description
  134
  - Class 9 Instructions: Miscellaneous
    134
- Class 9A Instruction Description
  135
- Class 9A Instruction Encoding
  135
- Class 9B Instruction Description
  135
- Bit, Byte, Word and String Addressing
  136
  - Data Memory Organization and Addressing
    137
  - Data Memory Access
    137
  - Data Memory Address and Data Relationship
    138
  - Data Memory Example
    139
- Class 9C Instruction Description
  136
- Class 9D Instruction Description
  136
- MSP50P614/MSP50C614 Computational Modes
  141
  - MSP50P614/MSP50C614 Computational Modes
    142
- Hardware Loop Instructions
  145
  - Hardware Loops in MSP50P614/MSP50C614
    146
  - Initial Processor State for String Instructions
    147
- String Instructions
  147
  - Lookup Instructions
    149
  - FIR Filter Structure
    151
- Input/Output Instructions
  151
- Special Filter Instructions
  151
  - Setup and Execution of MSP50P614/MSP50C614 Filter Instructions, N+1 Taps
    159
  - Filter Instruction and Circular Buffering for N+1 Tap Filter
    160
- Conditionals
  161
- Legend
  162
- Individual Instruction Descriptions
  166
  - Names for CC
    179
  - Valid Moves/Transfer in MSP50P614/MSP50C614 Instruction Set
    223
  - Instruction Set Encoding
    279
  - Instruction Set Summary
    288
- 5 Code Development Tools
  
  301
  - Introduction
    302
  - Level Translator Circuit
    303
  - Msp50C6Xx Software Development Tool
    303
  - Requirements
    304
  - Hardware Installation
    305
  - Installshield Window
    306
  - Software Installation
    306
  - Setup Window
    307
  - Exit Setup Dialog
    308
  - User Information Dialog
    308
  - Choose Destination Location Dialog
    309
  - Select Program Folder Dialog
    310
  - Copying Files
    311
  - Setup Complete Dialog
    312
  - Open Screen
    313
  - Software Emulator
    313
    
    The Open Screen
    313
  - Project Menu
    314
  - Project Open Dialog
    314
  - File Menu Options
    315
    
    Projects
    315
  - MSP50P614/MSP50C614 Code Development Windows
    316
    
    Description of Windows
    316
  - RAM Window
    317
  - CPU Window
    318
  - Program Window
    319
  - Hardware Breakpoint Dialog
    320
  - Inspect Dialog
    321
  - Inspect Window
    321
  - I/O Ports Window
    322
    
    Debugging a Program
    322
  - Debug Menu
    323
  - EPROM Programming Dialog
    325
  - Trace Mode
    326
  - Init Menu Option
    327
    
    Initializing Chip
    327
    
    Emulator Options
    328
  - Options Menu
    329
  - Miscellaneous Dialog
    329
  - Windows Menu Options
    330
    
    Emulator Online Help System
    330
  - Context Sensitive Help System
    331
    
    Known Differences, Incompatibilities, Restrictions
    332
  - Assembler
    333
    
    Assembler DLL
    333
    
    Assembler Directives
    334
  - Linker
    338
  - C–– Compiler
    339
    
    Foreword
    340
    
    Variable Types
    341
    
    External References
    341
    
    C– – Directives
    342
    
    Include Files
    344
    
    Function Prototypes and Declarations
    345
    
    Initializations
    345
    
    RAM Usage
    345
    
    Variable Types
    345
    
    String Functions
    345
  - String Functions
    346
    
    Constant Functions
    347
  - Implementation Details
    348
    
    Comparisons
    348
    
    Division
    350
    
    Function Calls
    350
    
    Programming Example
    351
    
    Programming Example, C – with Assembly Routines
    353
  - Beware of Stack Corruption
    367
  - Reported Bugs with Code Development Tool
    367
  - Applications
    369
  - Application Circuits
    370
  - MSP50C614/MSP50P614 Initialization Codes
    372
    
    File Init.asm
    373
  - Texas Instruments C614 Synthesis Code
    376
    
    Memory Overlay
    381
  - ROM Usage with Respect to Various Synthesis Algorithms
    382
- 7 Customer Information
  
  383
  - Scan Port Bond out
    384
  - Mechanical Information
    384
    
    Die Bond-Out Coordinates
    384
  - MSP50C614 100-Pin PJM Plastic Package Pinout Description
    385
    
    Package Information
    385
  - Pin Grid Array (PGA) Package Leads, P614
    388
  - Customer Information Fields in the ROM
    389
  - Speech Development Cycle
    390
  - Device Production Sequence
    390
  - Ordering Information
    392
  - New Product Release Forms
    392
  - Msp50C605
    395
    
    A.1 Introduction
    396
    
    A.2 Features
    396
    
    A.3 Architecture
    396
    
    A.3.1 Ram
    397
    
    A.3.2 Rom
    397
    
    A.3.3 I/O Pins
    397
  - MSP50C605 Architecture
    398
  - MSP50C605 Memory Organization
    399
  - MSP50C605 100-Pin PJM Package
    400
  - MSP50C605 100-Pin PJM Plastic Package Pinout Description
    401
  - Msp50C604
    403
    
    B.1 Introduction
    404
    
    B.2 Features
    404
    
    B.3 Architecture
    404
    
    B.3.1 Ram
    405
    
    B.3.2 Rom
    405
    
    B.3.3 I/O Pins
    405
  - MSP50C604 Block Diagram
    406
  - B.3.4 Slave Mode Operation
    407
  - MSP50C604 Memory Organization and I/O Ports
    408
  - MSP50C604 64-Pin PJM Plastic Package Pinout Description
    410
  - MSP50C604 Slave Mode Signals
    411
  - MSP50C604 64-Pin PJM Package
    411

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