Table 57.Slave Error Syndrome Register Bits - IBM CPC700 User Manual

Only software may clear the MxFLs. The MxAL (Master x Address Lock) fields control the Slave Error
Address Registers in the same way.
Writing a 1 to a bit of the SESR will clear that bit.
Bit(s) Name
19:0
20 M1AL
21 M1FL
22 M1RWS
25:23 M1ET
26 M0AL
27 M0FL
28 M0RWS
5-40

Table 57.Slave Error Syndrome Register Bits

Description
Reserved
Master 1 (the PCI interface in the CPC700) SEAR Address Lock
0 - SEAR1 Unlocked
1 - SEAR1 Locked
Master 1 (the PCI interface in the CPC700) SESR Field Lock
0 - SESR Unlocked
1 - SESR Locked
Master 1 (the PCI interface in the CPC700) Read/Write Status
0 - Error operation was a Write
1 - Error operation was a Read
Master 1 (the PCI interface in the CPC700) Error Type
000 - No Error
001 - Parity Error
01x - Reserved
100 - Reserved
101 - Non-configured Bank Error
11x - Reserved
Master 0 (60X-PLB interface in the CPC700) SEAR Address Lock
0 - SEAR0 Unlocked
1 - SEAR0 Locked
Master 0 (60X-PLB interface in the CPC700) SESR Field Lock
0 - SESR Unlocked
1 - SESR Locked
Master 0 (60X-PLB interface in the CPC700) Read/Write Status
0 - Error operation was a Write
1 - Error operation was a Read
PCI Interface