Processor Bus Arbiter; Table 13. Cpc700 Response To Processor Address Only Cycles; Table 14. Processor Address Bus Arbitration - IBM CPC700 User Manual

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Table 13. CPC700 Response to Processor Address Only Cycles

Proc Proc-Mem
Cycle WriteBuffer
Addr Only D.C.
D.C. - Don't Care

3.9 Processor Bus Arbiter

The CPC700's processor interface logic contains the processor bus arbiter which controls access to the
local processor bus. It arbitrates between processor requests and the internal snoop engine (PCI to mem-
ory) requests.
Arbitration for the bus for processor requests or the internal snoop engine is based on a rotating priority
scheme to ensure fairness and guarantee that each requesting device is given an equal opportunity to
access the bus in the event of simultaneous requests from multiple devices as viewed by the arbiter. The
bus arbiter implements bus parking for the processor in that it continuously asserts bus grant to the proces-
sor during the periods when there are no requests from either the PCI or processor bus. In this case the
arbitration favors the processor in that it may begin a bus transaction without explicitly requesting access to
the bus. The bus arbiter recognizes the instances when the processor initiates a bus transaction while
parked as an implicit bus request which was granted and maintains the rotating priority accordingly.
In general the priority is controlled by a rotating token which tracks the least recently granted device. Fol-
lowing Power-on Reset, the token defaults to the processor and attempts to park the processor address
bus. If the PCI/Snooper requests access to system memory, the arbiter removes the CPU bus grant, waits
to see if the processor begins an access and simultaneously rearbitrates to grant the bus to the PCI/
Snooper. The following table details the arbiter response for the request/grant scenarios.
Least Recently
Request Granted
CPU Only D.C.
PCI/Snooper D.C.
Only
CPU and PCI/ PCI/Snooper
Snooper
CPU and PCI/ CPU
Snooper
None D.C.
D.C. - Don't Care
CPC700 User's Manual—Preliminary
Proc-PLB PLB Slave
WriteBuffer (Snoop)
D.C. D.C.

Table 14. Processor Address Bus Arbitration

Granted
CPU
PCI/Snooper
PCI/Snooper
CPU
CPU
Response
AACK_N CPU immediately, no other ac-
tion
Comment
May be parked.
If processor bus parked, remove CPU grant,
grant to PCI/Snooper
Bus Parked on CPU
3-11