Mb0Ea - Memory Bank 0 Ending Address; Mbxsa - Memory Bank 1-4 Starting Address; Mbxea - Memory Bank 1-4 Ending Address - IBM CPC700 User Manual

4.9.1.5 MB0EA - Memory Bank 0 Ending Address

Address Offset: x58
Width: 32
Reset Value: xFFF0_0000
Access: Read/Write
This register contains the ending address of bank 0 for the boot ROM used at power up. The default values
of the MB0SA and MB0EA registers provide 2M Bytes of address space for the boot ROM.
Bit Name
0:11 MB0EA
12:31

4.9.1.6 MBxSA - Memory Bank 1-4 Starting Address

Address Offset: x3C, 40, 44, 48
Width: 32
Reset Value: x0000_0000
Access: Read/Write
These registers contain the starting addresses for banks 1 through 4. The minimum granularity for installed
memory is 1M Byte.
Bit Name
0:11 MBxSA
12:31

4.9.1.7 MBxEA - Memory Bank 1-4 Ending Address

Address Offset: x5C, 60, 64, 68
Width: 32
Reset Value: x0000_0000
Access: Read/Write
These registers contain the ending addresses for banks 1 through 4. The minimum granularity for installed
memory is 1M Byte.
CPC700 User's Manual—Preliminary
Reset Description
Value
xFFF Memory Bank 0 ending address.
Bit 0 corresponds to CPU A0, bit 11 corresponds to CPU A11.
0s Reserved
Reset Description
Value
0s Memory Bank x starting address.
Bit 0 corresponds to CPU A0, bit 11 corresponds to CPU A11.
0s Reserved
4-47