Compare Timers; Compare Timers Interrupt; Figure 49. Compare Timer Logic/Block Diagram - IBM CPC700 User Manual

• The corresponding Interrupt Mask bit must be reset (0) in the GPT Interrupt Mask (GPTIM) Register.
• The corresponding Interrupt Enable bit must be set (1) in the GPT Interrupt Enable (GPTIE) Register.
• The corresponding capture event must occur (set via the CPRCAPTEVNT register).
• If enabled in the CPC700 interrupt controller, the capture timer interrupt will be sent to the processor.

9.2.3 Compare Timers

Each of the five compare timers (GPTCOMP0-4) is 32 bits wide and provides a reference value which is
compared to the TBC. The compare timer continually compares its 32-bit programmed value with the TBC
value on a bit by bit basis. Each compare timer has a corresponding mask register (GPTMASK0-4) that
allows the masking of individual bits during the compare. A valid comparison is forced for the mask bits set.
If the corresponding GPT Interrupt Mask (GPTIM) Register bit is disabled (0), and when all bits either com-
pare or are masked, the GPT Interrupt Status (GPTIS) Register bit is set, indicating a valid comparison.
Further, if the corresponding GPT Interrupt Enable (GPTIE) Register bit is set (1), the interrupt will be sent
to the CPC700 interrupt controller. If enabled in the CPC700 interrupt controller, the compare event can be
used to interrupt the processor. See Figure 49 for the Compare Timer Logic/Block Diagram.
.
Time Base Counter (TBC)
Compare Register (COMPx)
Compare Mask (MASKx)
Interrupt Mask (GPTIM)
Interrupt Enable (GPTIE)

9.2.3.1 Compare Timers Interrupt

The following steps must happen in order for a compare timer interrupt to occur.
• The corresponding Compare Timer Register (COMPx) must be programmed to the desired compare
value.
• The corresponding Time Base Counter Mask Register (MASKx) must be programmed with the desired
mask bit pattern
• The corresponding Interrupt Mask bit must be reset (0) in the GPT Interrupt Mask (GPTIM) Register
9-4
XOR
Bitters
Compare

Figure 49. Compare Timer Logic/Block Diagram

Valid_Compare (1/5)
OR
Reduction
Interrupt Status (GPTIS)
Compare Int.
(1/5) to
Int. Controller
General Purpose Timers