4.9.2.4 DAM - DRAM Addressing Mode
Address Offset:
x34
Width:
32
Reset Value:
x0000_0000
Access:
Read/Write
This register selects the addressing mode for the various memory banks for SDRAM operation as defined
by the DRAMTYP bit. See Section 4.5.5, "Physical Address to Memory Mapping" for information on the var-
ious addressing modes available.
Bit
Name
0:1
DAM_0
2:3
DAM_1
4:5
DAM_2
6:7
DAM_3
8:9
DAM_4
10:31
CPC700 User's Manual—Preliminary
Reset
Description
Value
0s
Bank 0 Addressing mode:
00 - Mode 1
01 - Mode 2
10 - Mode 3
11 - Mode 4
0s
Bank 1 Addressing mode:
00 - Mode 1
01 - Mode 2
10 - Mode 3
11 - Mode 4
0s
Bank 2 Addressing mode:
00 - Mode 1
01 - Mode 2
10 - Mode 3
11 - Mode 4
0s
Bank 3 Addressing mode:
00 - Mode 1
01 - Mode 2
10 - Mode 3
11 - Mode 4
0s
Bank 4 Addressing mode:
00 - Mode 1
01 - Mode 2
10 - Mode 3
11 - Mode 4
0s
Reserved
4-51