Rom/Peripheral Attachment; Figure 28. Rom/Peripheral Attachement To Memory Bus - IBM CPC700 User Manual

4.6.7 ROM/Peripheral Attachment

ROM and peripheral devices share the memory address and data bus with SDRAM devices. In order to
provide a full 24-bit address to ROMs and peripheral devices an external address latch must be provided
as shown in
MA(12:11)
MA(9:0)
ALE
M_DATA(0:X-1)
Note: X = 8, 16, 32, or 64
Note: MA(10) is not used for ROM/Peripheral attachment as this bit is also used as the Auto-Precharge
(AP) bit for SDRAM.
The CPC700 is inherently a Big-Endian system. ROM and peripherals which are typically specified as litttle
endian should be connected with their MSB of their data bus attached to the CPC700's MSB. That is for a
64-bit ROM, CPC700 M_DATA(0) should connect to ROM(63) and CPC700(63) connects to ROM(0).
CPC700 User's Manual—Preliminary
373
Latch

Figure 28. ROM/Peripheral Attachement to Memory Bus

ROM Device
A(23:22)
A(21:12)
A(11:10)
A(9:0)
Data(X-1:0)
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