Timer Mode - Renesas M16C FAMILY Hardware Manual

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group

12.2.1 Timer Mode

In this mode, the timer counts an internally generated count source (see "Table 12.7 Timer Mode
Specifications"). An external signal input to the CNTR1 pin can be counted. The TYSC register is
unused in timer mode. Figure 12.15 shows the TYZMR and PUM registers in timer mode.
Table 12.7 Timer Mode Specifications
Item
Count source
Count operation
Divide ratio
Count start condition
Count stop condition
Interrupt request
generation timing
INT2/CNTR pin function
1
Read from timer
1
Write to timer
Select function
Notes:
1. The IR bit in the TYIC register is set to "1" (interrupt requested) if you write to the TYPR or PREY register while both
of the following conditions are met.
Conditions:
• TYWC bit in TYZMR register is "0" (write to reload register and counter simultaneously)
• TYS bit is "1" (count start)
To write to the TYPR or PREY register in the above state, disable interrupts before writing.
Rev.0.91 2003 Sep 08
f , f , f , external signal fed to CNTR1 pin
1 8 RING
• Down-count
• When the timer underflows, it reloads the reload register contents before continuing
counting (When the Timer Y underflows, the contents of the Timer Y primary reload
register is reloaded.)
fi/(n+1)(m+1) n: set value in PREY register, m: set value in TYPR register
Write "1" (count start) to TYS bit in TYZMR register
Write "0" (count stop) to TYS bit in TYZMR register
• When Timer Y underflows [Timer Y interrupt]
• Rising or falling of INT2/CNTR
Programmable I/O port, count source input or INT2 interrupt input
Count value can be read out by reading TYPR register.
Same applies to PREY register.
Value written to TYPR register is written to both reload register and counter or written to
only reload register. Selected by program.
Same applies to PREY register.
• Event counter function
When setting TYCK1 to TYCK0 bits to "11
counted.
• INT2/CNTR1 switching bit
Active edge of count source is selected by R1EDG bit.
page 83 of 184
Specification
input [INT2 interrupt]
1
", an external signal fed to CNTR1 pin is
2
12.2 Timer (Timer Y)