Renesas M16C FAMILY Hardware Manual page 42

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
High-speed ring control register 0
b7 b6 b5 b4 b3 b2 b1
0 0 0 0 0 0 0
Notes:
1. The HR01 bit should be changed under the following conditions.
• HR00 = 1 (high-speed ring oscillator on)
• CM1 register CM14 bit = 0 (low-speed ring oscillator on)
• CM0 register CM06 bit = 1 (divided-by-8 mode)
2. When OCD1 to OCD0 bits in the OCD register are set to "112"(the function is enabled), the HR01 bit should be set to "0".
High-speed ring control register 1
b7 b6 b5 b4 b3 b2 b1
0
Note:
1. Set the PRC0 bit in the PRCR register to "1" (write enable) before rewriting this register.
Figure 6.4 HR0 Register and HR1 Register
Rev.0.91 2003 Sep 08
b0
Symbol
HR0
Bit symbol Bit
name
High-speed ring enable bit 0: High-speed ring oscillator off
HR00
High-speed ring select bit
HR01
Reserved bit
(b7-b2)
1
b0
Symbol Address
HR1
The frequency of high-speed ring oscillator is adjusted with bits 0 to bits 6.
Period of high-speed ring oscillator
= td(HR offset) + (b6 + b5/2 + b4/4 + b3/8 + b2/16 + b1/32 + b0/64) x td(HR)
Bit 7 should be set to "0".
page 32 of 184
Address After reset
0008 00
16 16
1: High-speed ring oscillator on
0: Low-speed ring oscillator selected
1,2
1: High-speed ring oscillator selected
"0"
Should set to
After reset
000B 40
16 16
Function
6. Clock Generating Circuit
Function RW
RW
RW
RW
RW
RW