Renesas M16C FAMILY Hardware Manual page 89

16-bit single-chip microcomputer
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Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
Underflow signal
of prescaler X
"1"
TXS bit in TXMR
register
"0"
CNTR0 pin
"1"
input
"0"
Timer X
contents
Contents of
1
read-out buffer
TXEDG bit in
"1"
TXMR register
"0"
TXUND bit in
"1"
TXMR register
"0"
IR bit in TXIC
"1"
register
"0"
IR bit in INT1IC
"1"
register
"0"
Conditions: A period from one rising edge to the next rising edge of measurement pulse is measured (R0EDG=0)
with TX register initial value=0F
Notes:
1. The contents of the read-out buffer can be read when the TX register is read in pulse period measurement mode.
2. After an active edge of measurement pulse is input, the TXEDG bit in the TXMR register is set to "1" (active edge found)
when the prescaler X underflows for the second time.
3. The TX register should be read before the next active edge is input after the TXEDG bit is set to "1" (active edge found).
The contents in the read-out buffer is retained until the TX register is read. If the TX register is not read before the next
active edge is input, the measured result of the previous period is retained.
4. When set to "0" by program, use a MOV instruction to write "0" to the TXEDG in the TXMR register. At the same time,
write "1" to the TXUND bit.
5. When set to "0" by program, use a MOV instruction to write "0" to the TXUND in the TXMR register. At the same time,
write "1" to the TXEDG bit.
6. The TXUND and TXEDG bits are both set to "1" if the timer underflows and reloads on an active edge simultaneously. In
this case, the validity of the TXUND bit should be determined by the contents of the read-out buffer.
Figure 12.10 Operation Example in Pulse Period Measurement Mode
Rev.0.91
2003 Sep 08
Set to "1" by program
Starts counting
Timer X
reloads
0F
0E
0D
0F
0E
16
16
16
16
Retained
0E
0F
0D
16
16
(Note 2)
Cleared to "0" when interrupt request is accepted, or cleared by program
Cleared to "0" when interrupt request is accepted, or cleared by program
.
16
page 79 of 184
Timer X
reloads
0D
0C
0B
0A
09
0F
16
16
16
16
16
16
16
Retained
0B
0A
09
16
16
16
16
Timer X read
(Note 3)
(Note 2)
Cleared to "0" by program
(Note 4)
12.1 Timer (Timer X)
0E
0D
01
00
0F
16
16
16
16
00
0F
0D
01
16
16
16
Timer X read
(Note 3)
(Note 6)
Cleared to "0" by program
Timer X
reloads
0E
16
16
0E
16
16
(Note 5)

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