Renesas M16C FAMILY Hardware Manual page 40

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
System clock control register 0
b7 b6 b5 b4 b3 b2 b1
0 0 1 0 0
Notes
1: Set the PRC0 bit of PRCR register to "1" (write enable) before writing to this register.
2: The CM05 bit is provided to stop the main clock when the ring oscillator mode is selected. This bit cannot be used for detection as
to whether the main clock stopped or not. To stop the main clock, the following setting is required:
(1) Set the CM06 bit to "1" (divide-by-8 mode)
(2) Set the OCD0 and OCD1 bits in the OCD register to "00
(3) Set the OCD2 bit to "1" (selecting ring oscillator).
3: During external clock input, only the clock oscillation buffer is turned off and clock input is accepted.
4: When the CM05 bit is set to "1" (main clock stop), P4
5: When entering stop mode from high or middle speed mode, the CM06 bit is set to "1" (divide-by-8 mode).
6: During ring oscillator mode, this bit must be set to "0" (peripheral clock turned on when in wait mode).
System clock control register 1
b7 b6 b5 b4 b3 b2
0
Notes:
1: Write to this register after setting the PRC0 bit of PRCR register to "1" (write enable).
2: When entering stop mode from high or middle speed mode, the CM15 bit is set to "1" (drive capability high).
3: Effective when the CM06 bit is "0" (CM16 and CM17 bits enable).
4: If the CM10 bit is "1" (stop mode), the internal feedback resistor becomes ineffective.
5: The CM14 bit can be set to "1" (low-speed ring oscillator off) if the OCD2 bit=0 (selecting main clock). When the OCD2 bit is set
to "1" (selecting ring oscillator clock), the CM14 bit is set to "0" (low-speed ring oscillator on). This bit remains unchanged when "
1" is written.
6: When using voltage detection interrupt circuit, CM14 bit is set to "0"
Figure 6.2 CM0 Register and CM1 Register
Rev.0.91 2003 Sep 08
1
b0
Symbol
CM0
Bit symbol Bit name
Reserved bit
(b1-b0)
WAIT peripheral function
CM02
clock stop bit
Reserved bit
(b3)
Reserved bit
(b4)
Main clock (X
CM05
2, 4
stop bit
Main clock division select
CM06
5
bit 0
Reserved bit
(b7)
1
b1 b0
Symbol
0
CM1
Bit symbol Bit name
All clock stop control bit
CM10
Reserved bit
(b1)
Reserved bit
(b2)
Port X -X
CM13 IN
Low-speed ring oscillation
CM14
stop bit 5,6
X -X drive capability
IN OUT
CM15
2
select bit
Main clock division
CM16
select bit 1
CM17
page 30 of 184
Address After reset
0006 68
16 16
Must set to "0"
0 : Do not stop peripheral function clock in wait mode
1 : Stop peripheral function clock in wait mode
Must set to "1"
Must set to "0"
-X ) 0 : On
CIN COUT
3
1 : Off
0 : CM16 and CM17 valid
1 : Divide-by-8 mode
Must set to "0"
" (disabling oscillation stop detection function).
2
and P4 can be used as input ports.
6 7
Address After reset
0007 20
16 16
4 0 : Clock on
1 : All clocks off (stop mode)
"0"
Must set to
"0"
Must set to
0 : Input port P4
switch bit
OUT
1 : X -X pin
IN OUT
0 : Low-speed ring oscillator on
1 : Low-speed ring oscillator off
0 : LOW
1 : HIGH
b7 b6
0 0 : No division mode
3
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
6. Clock Generating Circuit
Function
Function
, P4
6 7
RW
RW
6
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW