Renesas M16C FAMILY Hardware Manual page 131

Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
• Example of transmit timing when transfer data is 8 bits long (parity enabled, one stop bit)
Transfer clock
UiC1 register
"1"
TE bit
"0"
"1"
UiC1 register
TI bit
"0"
TxDi
UiC0 register
"1"
TXEPT bit
"0"
SiTIC register "1"
IR bit
"0"
The above timing diagram applies to the case where the register bits
are set as follows:
• UiMR register PRYE bit = 1 (parity enabled)
• UiMR register STPS bit = 0 (1 stop bit)
• UiIRS bit = 1 (an interrupt request occurs when transmit completed):
• Example of transmit timing when transfer data is 9 bits long (parity disabled, two stop bits)
Transfer clock
"1"
UiC1 register
TE bit
"0"
UiC1 register "1"
TI bit
"0"
TxDi
"1"
UiC0 register
TXEPT bit
"0"
SiRIC register
"1"
IR bit
"0"
The above timing diagram applies to the case where the register
bits are set as follows:
• UiMR register PRYE bit = 0 (parity disabled)
• UiMR register STPS bit = 1 (2 stop bits)
• UiIRS bit = 0 (an interrupt request occurs when transmit buffer
becomes empty)
Figure 13.9 Transmit Operation
Rev.0.91 2003 Sep 08
Tc
Write data to UiTB register
Transferred from UiTB register to UARTi transmit register
Start
bit
ST D D
D D D D
0 3
1 2 4 5
Tc
Write data to UiTB register
Start
bit
ST D D D D D D
0 1 2 3 4 5
Set to "0" when interrupt request is accepted, or set by a program
page 121 of 184
13.2 Clock Asynchronous Serial I/O (UART) Mode
Parity Stop
bit bit
D ST D
D P SP D D
7 0
6 1 2
Set to "0" when interrupt request is accepted, or set by a program
Tc = 16 (n + 1) / fj or 16 (n + 1) / f
fj: frequency of UiBRG count source (f
f : frequency of UiBRG count source (external clock)
EXT
n: value set to UiBRG
i: 0, 1
Transferred from UiTB register to UARTi
transmit register
Stop Stop
bit bit
D D D SP SP ST D D D
6 7 8 0 1
Tc = 16 (n + 1) / fj or 16 (n + 1) / f
fj: frequency of UiBRG count source (f
f : frequency of UiBRG count source (external clock)
EXT
n: value set to UiBRG
i: 0, 1
Stopped pulsing
because the TE bit
= "0"
D D
D D D P SP
3 7
4 5 6
EXT
, f
1SIO
D D D D D D SPSP
2 3 4 5 6 7 8
EXT
, f
1SIO
ST
D D
0 1
, f )
8SIO 32SIO
ST D D
0 1
, f )
8SIO 32SIO