Voltage Detection Interrupt - Renesas M16C FAMILY Hardware Manual

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group

5.4.1 Voltage Detection Interrupt

Figure 5.13 shows the block diagram of voltage detection interrupt generation circuit.
Refer to 5.4.2, "Exiting Stop Mode on a Voltage Detection Circuit" for Getting out of stop mode due to
the voltage detection interrupt.
A voltage detection interrupt is generated when the input voltage at the V
or drops below Vdet if all of the following conditions hold true in normal operation mode and wait
mode.
• The VC27 bit in the VCR2 register is set to "1" (voltage detection circuit enabled)
• The D40 bit in the D4INT register is set to "1" (voltage detection interrupt enabled)
• The D46 bit in the D4INT register is set "0" (voltage detection interrupt selected)
To use the voltage detection interrupt , set the CM14 bit in the CM1 register to "0" (low-ring oscillator).
Figure 5.14 shows an operation example of voltage detection interrupt generation circuit.
The voltage detection interrupt shares the interrupt vector with the watchdog timer interrupt and oscil-
lation stop detection interrupt.
The D42 bit in the D4INT register becomes "1" when passing through Vdet is detected after the volt-
age inputted to the V
A voltage detection interrupt request is generated when the D42 bit changes state from "0" to "1". The
D42 bit needs to be set to "0" in a program.
Table 5.2 lists the voltage detection interrupt request generation conditions.
It takes 4 cycles of sampling clock until the D42 bit is set to "1" since the voltage which inputs to
Vcc pin passes Vdet.
It is possible to set the sampling clock detecting that the voltage applied to the V
through Vdet with the DF0 to DF1 bits in the D4INT register.
Table 5.2 Voltage Detection Interrupt Request Generation Conditions
Operation mode VC27 bit
Normal operation
1
1
mode
Wait mode
1
Notes:
1. The status except the wait mode and stop mode is handled as the normal mode. (Refer to Chapter 6, "Clock
Generation Circuit.")
2. Refer to Figure 5.14, "Operation Example of Voltage Detection Interrupt Generation Circuit" for interrupt generation
timing.
Rev.0.91 2003 Sep 08
pin is up or down.
CC
D40 bit D41 bit
1 0 or 1
1 0 or 1
page 25 of 184
D42 bit D46 bit VC13 bit
From 0 to 1
0 0
From 1 to 0
From 0 to 1
0 0
From 1 to 0
5.4 Voltage Detection Circuit
pin rises to Vdet or more
CC
pin has passed
CC
CM14 bit
2
0
2
2
0
2