Chapter 7. Protection - Renesas M16C FAMILY Hardware Manual

16-bit single-chip microcomputer
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Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
7. Protection
In the event that a program runs out of control, this function protects the important registers so that they
will not be rewritten easily. Figure 7.1 shows the PRCR register. The following lists the registers protected
by the PRCR register.
• Registers protected by PRC0 bit: CM0, CM1, and OCD, HR0, HR1 registers
• Registers protected by PRC1 bit: PM0 and PM1 registers
• Registers protected by PRC2 bit: PD0 register
• Registers protected by PRC3 bit: VCR2 and D4INT registers
Set the PRC2 bit to "1" (write enabled) and then write to any address, and the PRC2 bit will be set to "0"
(write protected). The registers protected by the PRC2 bit should be changed in the next instruction after
setting the PRC2 bit to "1". Make sure no interrupts will occur between the instruction in which the PRC2
bit is set to "1" and the next instruction. The PRC0 and PRC1 bits are not automatically set to "0" by writing
to any address. They can only be set to "0" in a program.
Protect register
b7
b6
b5
b4
b3
b2
0
0
Notes:
1. The PRC2 bit is set to "0" by writing to any address after setting it to "1". Other bits are not set to "0"
by writing to any address, and must therefore be set to "0" in a program.
Figure 7.1 PRCR Register
Rev.0.91
2003 Sep 08
b1
b0
Symbol
PRCR
Bit symbol
PRC0
Protect bit 0
PRC1
Protect bit 1
PRC2
Protect bit 2
PRC3
Protect bit 3
Reserved bit
(b5-b4)
Reserved bit
(b7-b6)
page 44 of 184
Address
After reset
000A
00XXX000
16
2
Bit name
Enable write to CM0, CM1, OCD,
HR0, HR1 registers
0 : Write protected
1 : Write enabled
Enable write to PM0, PM1
registers
0 : Write protected
1 : Write enabled
Enable write to PD0 register
0 : Write protected
1 : Write enabled
Enable write to VCR2, D4INT
registers
0 : Write protected
1 : Write enabled
When write, should set to "0"
When read, its content is "0".
7. Protection
Function
RW
RW
RW
RW
1
RW
RW
RO

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