Renesas M16C FAMILY Hardware Manual page 136

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
A-D control register 2
b7 b6 b5 b4 b3 b2 b1 b0
0 0 0
Notes:
1. If the ADCON2 register is rewritten during A-D conversion, the conversion result is indeterminate.
A-D register
(b15)
b7
Figure 14.3 ADCON2 Register and AD Register
Rev.0.91 2003 Sep 08
1
Symbol
ADCON2
Bit symbol
A-D conversion method
SMP
select bit
Reserved bit
(b3-b1)
Nothing is assigned.
(b7-b4)
When write, write "0". When read, its content is "0".
Symbol
AD
(b8)
b0 b7
When BITS bit in ADCON1
register is set to "1" (10-bit
mode)
Eight low-order bits of
A-D conversion result
Two high-order bits of
A-D conversion result
Nothing is assigned.
When write, set to "0". When read, its content is "0".
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Address After reset
00D4
16
Bit name
0 : Without sample and hold
1 : With sample and hold
Must set to "0"
Address After reset
00C1 -00C0 Indeterminate
16 16
b0
Function
When BITS bit in ADCON1
register is set to "0" (8-bit
mode)
A-D conversion result
When read, its content is
indeterminate.
14. A-D Converter
00
16
Function
RW
RW
RW
RW
RO
RO