Renesas M16C FAMILY Hardware Manual page 149

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
Pull-up control register 0
b7 b6 b5 b4 b3
Notes:
1. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Pull-up control register 1
b7 b6 b5 b4 b3
Notes:
1. The P4 pin for which the PU11 bit is "1" (pulled high) and the PD4_5 bit is "0" (input mode) is pulled high.
5
Port P1 drive capacity control register
b7 b6 b5 b4 b3
Figure 15.9 PUR0 Register, PUR1 Register, and DRR Register
Rev.0.91 2003 Sep 08
b2 b1 b0
Symbol
PUR0
Bit symbol
PU00 P0
PU01 P0
PU02 P1
PU03 P1
Nothing is assigned.
(b5-b4)
When write, set to "0". When read, its content is indeterminate.
PU06 P3
PU07 P3
b2 b1 b0
Symbol
PUR1
Bit symbol
Nothing is assigned.
(b0)
When write, set to "0". When read, its content is indeterminate.
PU11 P4
Nothing is assigned.
(b7-b2)
When write, set to "0". When read, its content is indeterminate.
b2 b1 b0
Symbol
DRR
Bit symbol
DRR0 P1
DRR1 P1
DRR2 P1
DRR3 P1
DRR4 P1
DRR5 P1
DRR6 P1
DRR7 P1
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Address
00FC
16
Bit name
1
to P0 pull-up
0 3
0 : Not pulled high
1
to P0 pull-up 1 : Pulled high
4 7
1
to P1 pull-up
0 3
1
to P1 pull-up
4 7
1
to P3 pull-up 0 : Not pulled high
0 3
1 : Pulled high
1
pull-up
7
Address
00FD
16
Bit name
0 : Not pulled high
1
pull-up
5
1 : Pulled high
Address
00FE
16
Bit name
drive capacity
0
Set P1 N-channel output transistor
drive capacity drive capacity
1
drive capacity
2
drive capacity
3
drive capacity
4
drive capacity
5
drive capacity
6
drive capacity
7
15. Programmable I/O Ports
After reset
00XX0000
2
Function
1
1
After reset
XXXXXX0X
2
Function
1
After reset
00
16
Function
0 : LOW
1 : HIGH
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW