Renesas M16C FAMILY Hardware Manual page 123

Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
UARTi transmit/receive control register 1 (i=0, 1)
b7 b6 b5 b4 b3 b2 b1
Notes:
1. As for the UART1, set the TXD1EN bit in the UCON register before setting this bit to reception enabled.
2. The RI bit is set to "0" when the higher byte of the UiRB register is read.
UART transmit/receive control register 2
b7 b6 b5 b4 b3 b2
0 0
Notes
1. For P3 , select "0" (RxD
7
Set the PD3_7 bit in the PD3 register to "0" (input mode) when receiving.
Figure 13.5 U0C1 and U1C1 Registers and UCON Register
Rev.0.91 2003 Sep 08
Symbol
b0
U0C1
U1C1
Bit
Bit
symbol
name
TE Transmit enable bit
TI Transmit buffer
empty flag
RE Receive enable bit
RI
Receive complete flag
Nothing is assigned.
(b7-b4)
When write, set "0". When read, its content is "0".
b1 b0
Symbol
UCON
Bit
Bit
symbol
name
U0IRS UART0 transmit
interrupt cause select bit
U1IRS UART1 transmit
interrupt cause select bit
U0RRM UART0 continuous
receive mode enable bit
Reserved bit
(b4-b3)
Port TxD switching bit
TXD1SEL 11
TXD1EN TxD /RxD
10 1
select bit
Nothing is assigned.
(b7)
When write, set "0". When read, its content is "0".
) for data receive, and "1" (TxD
1
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Address After reset
00A5 02
16 16
00AD 02
16 16
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in UiTB register
1 : No data present in UiTB register
1
0 : Reception disabled
1 : Reception enabled
0 : No data present in UiRB register
2
1 : Data present in UiRB register
Address After reset
00B0 00
16 16
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed (TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed (TXEPT = 1)
0 : Continuous receive mode disabled
1 : Continuous receive mode enable
Must set to "0"
0 : I/O port P0
0
1 : TxD
11
0 : RxD
1
1 : TxD
10
) for data transfer.
10
Function
Function
13. Serial I/O
RW
RW
RO
RW
RO
RW
RW
RW
RW
RW
RW
RW