Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
Set value in TM1 register
Set value in TM0 register
TCC00 bit in
TCC0 register
IR bit in CMP0IC
register
IR bit in CMP1IC
register
CMP0
output
0
CMP1
output
0
The above applies to the following conditions.
TCC12 bit in TCC1 register=1 (TC register is set to "0000
TCC13 bit in TCC1 register=1 (Compare 0 output selected)
TCC15 to TCC14 bits in TCC1 register =11
TCC17 to TCC16 bits in TCC1 register=10
TCOUT6 bit in TCOUT register=0 (not reversed)
TCOUT7 bit in TCOUT register =1 (reversed)
TCOUT0 bit in TCOUT register=1 (CMP0
TCOUT4 bit in TCOUT register=1 (CMP1
P1_0 bit in P1 register=1 (high)
P3_0 bit in P3 register=1 (high)
Figure 12.34 Operation Example of Timer C in Output Compare Mode
Rev.0.91
2003 Sep 08
Count start
Match
0000
16
Set to "1" by program
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
"1"
"0"
2
(CMP output level is set to low at Compare 1 match occurrence)
2
output enabled)
0
output enabled)
0
page 108 of 184
Match
Set to "0" when interrupt request is accepted, or set by program
" at Compare 1 match occurrence )
16
(CMP output level is set to high at Compare 0 match occurrence)
12.4 Timer (Timer C)
Match
Time
Set to "0" when interrupt request is
accepted, or set by program