Renesas M16C FAMILY Hardware Manual page 130

Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
Table 13.5 Registers to Be Used and Settings in UART Mode
Register Bit
UiTB 0 to 8
UiRB 0 to 8
OER,FER,PER,SUM Error flag
UiBRG ---
UiMR SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
UiC0 CLK0, CLK1
TXEPT
NCH
UFORM
UiC1 TE
TI
RE
RI
UCON U0IRS, U1IRS
U0RRM
TXD1SEL
TXD1EN
Notes:
1. The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long; bit 0
to bit 7 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.
2. An external clock can be selected in UART0 only.
Table 13.6 lists the functions of the input/output pins during UART mode. Note that for a period from when
the UARTi operation mode is selected to when transfer starts, the TxDi pin outputs an "H". (If the N-
channel open-drain output is selected, this pin is in a high-impedance state.)
Table 13.6 I/O Pin Functions
Pin name
TxD (P1 )
0 4
Serial data output
RxD (P1 ) Serial data input
0 5
CLK (P1 ) Transfer clock output
0 6
Transfer clock input
TxD /RxD
Serial data output
10 1
(P3 )
7
Serial data input
TxD (P0 )
11 0 Serial data output
Rev.0.91 2003 Sep 08
Set transmission data
Reception data can be read
Set a transfer rate
Set these bits to '100
Set these bits to '101
Set these bits to '110
Select the internal clock or external clock
Select the stop bit
Select whether parity is included and whether odd or even
Select the count source for the UiBRG register
Transmit register empty flag
Select TxDi pin output mode
LSB first or MSB first can be selected when transfer data is 8 bits long. Set this
bit to "0" when transfer data is 7 or 9 bits long.
Set this bit to "1" to enable transmission
Transmit buffer empty flag
Set this bit to "1" to enable reception
Reception complete flag
Select the source of UART0/UART1 transmit interrupt
Set to "0"
Select output pin for UART1 transfer data
Select TxD
10
Function
(Cannot be used as a port when performing reception only)
PD1 register PD1_5 bit=0
(Can be used as an input port when performing transmission only)
U0MR register CKDIR bit=0
U0MR register CKDIR bit=1
PD1 register PD1_6 bit=0
TXD1EN=1
TXD1EN=0, PD3 register PD3_7 bit=0
Serial data output, TXD1SEL=1
page 120 of 184
13.2 Clock Asynchronous Serial I/O (UART) Mode
Function
1
1
' when transfer data is 7 bits long
2
' when transfer data is 8 bits long
2
' when transfer data is 9 bits long
2
or RxD to be used
1
Method of selection
2