A-D Converter - Renesas M16C FAMILY Hardware Manual

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group

19.5 A-D Converter

(1) When writing to each bit but except bit 6 in the ADCON0 register, each bit in the ADCON1 register, or
the SMP bit in the ADCON2 register, A/D conversion must be stopped (before a trigger occurs).
When the VCUT bit in the ADCON1 register is changed from "0" (V
connected), wait at least 1 µs before starting A/D conversion.
(2) When changing AD operation mode, select an analog input pin again.
(3) In one-shot mode, A/D conversion must be completed before reading the AD register. The IR bit in
the ADIC register can indicates whether the A/D conversion is completed or not.
(4) In repeat mode, the undivided main clock must be used for the CPU clock.
(5) If A/D conversion is forcibly terminated while in progress by setting the ADST bit in the ADCON0
register to "0" (A/D conversion halted), the conversion result of the A/D converter is indeterminate. If
the ADST bit is set to "0" in a program, ignore the value of AD register.
(6) A 0.1 µF capacitor should be connected between the AVcc/V
Rev.0.91 2003 Sep 08 page 175 of 184
not connected) to "1" (V
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pin and AVss pin.
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19. Usage Notes
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