Renesas M16C FAMILY Hardware Manual page 102

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
Timer Y, Z mode register
b7 b6 b5 b4 b3 b2 b1 b0
0
0
Notes:
1. When TZS bit=1 (starts counting), the value set in the TZWC bit is valid. If TZWC bit=0, the timer Z count value is
written to both reload register and counter. If TZWC bit=1, the timer Z count value is written to the reload register
only.
When TZS bit=0 (stops counting), the timer Z count value is written to both reload register and counter regardless
of how the TZWC bit is set.
Timer Y, Z waveform output control register
b7 b6 b5 b4 b3 b2 b1 b0
0 0 0
0 0
Figure 12.22 TYZMR Register and PUM Register in Timer Mode
Rev.0.91 2003 Sep 08
Symbol
TYZMR
Bit symbol
Bit name
TYMOD0
Timer Y-related bit
R1EDG
TYWC
TYS
Timer Z operation
TZMOD0
mode bit
TZMOD1
Timer Z write
TZWC
control bit
Timer Z count
TZS
start flag
Symbol
PUM
0 0
Bit symbol Bit name
Reserved bit
(b3-b0)
TYOPL
Timer Y-related bit
Timer Z output level
TZOPL
latch
INT0 pin one-shot
INOSTG
trigger control bit
INT0 pin one-shot trigger
INOSEG
polarity select bit
page 92 of 184
Address After reset
0080 00
16 16
Function
b5 b4
0 0 : Timer mode
0 : Write to reload register and counter
1
1 : Write to reload register only
0 : Stops counting
1 : Starts counting
Address After reset
0084 00
16 16
Function
Must set to "0"
Must set to "0" in timer mode
Must set to "0" in timer mode
Must set to "0" in timer mode
12.3 Timer (Timer Z)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW