Renesas M16C FAMILY Hardware Manual page 39

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
CM10=1(Stop mode)
RESET
Hardware reset2
Power on reset
Interrupt request level
judgment output
Voltage detective
interrupt
CM02, CM05, CM06: Bits in CM0
CM10, CM13, CM14, CM16, CM17: Bits in CM1 register
OCD0, OCD1, OCD2: Bits in OCD register
HR00, HR01: Bits in HR0 register
Oscillation stop detection circuit
Main clock
Figure 6.1 Clock Generation Circuit
Rev.0.91 2003 Sep 08
HR00
CM14
S Q
R
X
IN
CM05
S Q
R
WAIT instruction
R
Forcible discharge when OCD0
Pulse generation
circuit for clock
Charge,
edge detection
discharge
and charge,
circuit
discharge control
circuit OCD1
Notes:
1. Set the same value to the OCD1 bit and OCD0 bit.
page 29 of 184
Ring
High-speed
oscillator
ring oscillator
clock
HR01=1
HR01=0
Low-speed
ring oscillator
fRING-S
Voltage
detection
circuit
Oscillation
stop
detection
Main
clock
OCD2=1
X
OUT
OCD2=0
CM13
CM02
e
1/2 1/2
a
CM06=0
CM17 to CM16=01
CM06=0
CM17 to CM16=00
2
1
Oscillation stop
detection interrupt
generation circuit
1
Watchdog
timer
interrupt
OCD2 bit switch signal
CM14 bit switch signal
6. Clock Generating Circuit
f
RING-fast
f
RING
f
RING128
1/128
f
1

f
1SIO
f
AD
f
2

f
8
f
8SIO
f
32

e c
b f
32SIO
a
d
Divider
b
1/2 1/2 1/2
CM06=0
CM17 to CM16=11
CM06=1
CM06=0
CM17 to CM16=10
2
2
Details of divider
Oscillation stop
detection,
watchdog timer,
Voltage
detection
interrupt
Peripheral
function clock
CPU clock
c c
2
d