Renesas M16C FAMILY Hardware Manual page 94

16-bit single-chip microcomputer
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Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
Timer Y, Z mode register
b7 b6 b5 b4 b3 b2 b1 b0
Notes:
1. The IR bit in the INT2IC register may be set to "1" (interrupt requested) when the R1EDG bit is rewritten.
Refer to the paragraph 1.2.5 "Changing Interrupt Source" in the Usage Notes Reference Book.
2. When TYS bit= 1 (starts counting), the value set in the TYWC bit is valid. If TYWC bit=0, the timer Y count value is
written to both reload register and counter. If TYWC bit=1, the timer Y count value is written to the reload register
only. When TYS bit=0 (stops counting), the timer Y count value is written to both reload register and counter
regardless of how the TYWC bit is set.
Timer Y, Z waveform output control register
b7 b6 b5 b4 b3 b2 b1 b0
0
0
Figure 12.15 TYZMR Register and PUM Register in Timer Mode
Rev.0.91
2003 Sep 08
Symbol
TYZMR
0
Bit symbol
Bit name
Timer Y operation
TYMOD0
mode bit
INT2/CNTR1 polarity
R1EDG
switching bit
Timer Y write
TYWC
control bit
Timer Y count
TYS
start flag
Timer Z-related bit
TZMOD0
TZMOD1
TZWC
TZS
Symbol
PUM
0
0
Bit symbol
Reserved bit
(b3-b0)
TYOPL
Timer Y output level
latch
TZOPL
Timer Z-related bits
INOSTG
INOSEG
page 84 of 184
Address
After reset
0080
00
16
0 : Timer mode
0 : Rising edge
1 : Falling edge
1
0 : Write to reload register and counter
simultaneously
2
1 : Write to reload register
0 : Stops counting
1 : Starts counting
Address
After reset
0084
00
16
16
Bit name
Must set to "0"
Invalid in timer mode
12.2 Timer (Timer Y)
16
Function
Function
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW

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